Learning tool for converting boolean expression and logic circuit diagram

Abstract

An endeavor has made to develop an application software tool called “Logic Circuit Diagram Designer”. Logic Circuit Diagram Designer is a learning tool for Logical Circuit Designing and simplifying Boolean expression. This paper explains algorithm and methodology for transforming Boolean Expression into Logic Circuit diagram and transforming Logic circuit diagram into Boolean Expression. The Karnaugh-map technique is used to simplify the Boolean Expression. The versatile software Logic Circuit Diagram Designer has developed using C# language in Microsoft Visual Studio.Net 2008